-
#(comment),\(linecontinued),*(wildcard),{}(stringescape)
- $VTR_ROOT
-
--absorb_buffer_luts {on | off}
-
--acc_fac <float>
-
--activity_file <file>
-
--allow_unrelated_clustering {on | off | auto}
-
--alpha_clustering <float>
-
--alpha_t <float>
-
--analysis
-
--astar_fac <float>
-
--auto <int>
-
--balance_block_type_utilization {on, off, auto}
-
--base_cost_type {demand_only | delay_normalized | delay_normalized_length | delay_normalized_frequency | delay_normalized_length_frequency}
-
--bb_factor <int>
-
--bend_cost <float>
-
--beta_clustering <float>
-
--circuit_file <file>
-
--circuit_format {auto | blif | eblif}
-
--clock_modeling {ideal | route | dedicated_network}
-
--cluster_seed_type {blend | timing | max_inputs}
-
--clustering_pin_feasibility_filter {on | off}
-
--congested_routing_iteration_threshold CONGESTED_ROUTING_ITERATION_THRESHOLD
-
--connection_driven_clustering {on | off}
-
--const_gen_inference {none | comb | comb_seq}
-
--constant_net_method {global | route}
-
--criticality_exp <float>
-
--device <string>
-
--disp {on | off}
-
--echo_dot_timing_graph_node { string | int }
-
--echo_file {on | off}
-
--enable_timing_computations {on | off}
-
--exit_before_pack {on | off}
-
--exit_t <float>
-
--first_iter_pres_fac <float>
-
--fix_pins {free | random | <file.pads>}
-
--full_stats
-
--gen_post_synthesis_netlist { on | off }
-
--graphics_commands <string>
-
--incremental_reroute_delay_ripup {on | off | auto}
-
--init_t <float>
-
--initial_pres_fac <float>
-
--inner_loop_recompute_divider <int>
-
--inner_num <float>
-
--max_criticality <float>
-
--max_router_iterations <int>
-
--min_incremental_reroute_fanout <int>
-
--min_route_chan_width_hint <int>
-
--net_file <file>
-
--netlist_verbosity <int>
-
--outfile_prefix <string>
-
--pack
-
--pack_feasible_block_array_size <int>
-
--pack_high_fanout_threshold {auto | <int> | <string>:<int>}
-
--pack_prioritize_transitive_connectivity {on | off}
-
--pack_transitive_fanout_threshold <int>
-
--pack_verbosity <int>
-
--place
-
--place_algorithm {bounding_box | path_timing_driven}
-
--place_chan_width <int>
-
--place_delay_model {delta, delta_override}
-
--place_delay_model_reducer {min, max, median, arithmean, geomean}
-
--place_delay_offset <float>
-
--place_delay_ramp_delta_threshold <float>
-
--place_delay_ramp_slope <float>
-
--place_file <file>
-
--place_rlim_escape <float>
-
--place_tsu_abs_margin <float>
-
--place_tsu_rel_margin <float>
-
--post_place_timing_report <file>
-
--power
-
--pres_fac_mult <float>
-
--read_rr_graph <file>
-
--recompute_crit_iter <int>
-
--route
-
--route_bb_update {static, dynamic}
-
--route_chan_width <int>
-
--route_file <file>
-
--route_type {global | detailed}
-
--router_algorithm {breadth_first | timing_driven}
-
--router_debug_net <int>
-
--router_debug_sink_rr <int>
-
--router_debug_sink_rr ROUTER_DEBUG_SINK_RR
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--router_first_iter_timing_report <file>
-
--router_high_fanout_threshold ROUTER_HIGH_FANOUT_THRESHOLD
-
--router_init_wirelength_abort_threshold <float>
-
--router_initial_timing {all_critical | lookahead}
-
--router_lookahead {classic, map}
-
--router_max_convergence_count <float>
-
--router_reconvergence_cpd_threshold <float>
-
--router_update_lower_bound_delays {on | off}
-
--routing_budgets_algorithm { disable | minimax | scale_delay }
-
--routing_failure_predictor {safe | aggressive | off}
-
--save_graphics {on | off}
-
--save_routing_per_iteration {on | off}
-
--sdc_file <file>
-
--seed <int>
-
--sink_rr_node <int>
-
--source_rr_node <int>
-
--strict_checks {on, off}
-
--sweep_constant_primary_outputs {on | off}
-
--sweep_dangling_blocks {on | off}
-
--sweep_dangling_nets {on | off}
-
--sweep_dangling_primary_ios {on | off}
-
--target_ext_pin_util { auto | <float> | <float>,<float> | <string>:<float> | <string>:<float>,<float> }
-
--target_utilization <float>
-
--td_place_exp_first <float>
-
--td_place_exp_last <float>
-
--tech_properties <file>
-
--timing_analysis {on | off}
-
--timing_driven_clustering {on|off}
-
--timing_report_detail { netlist | aggregated | detailed }
-
--timing_report_npaths <int>
-
--timing_report_skew { on | off }
-
--timing_tradeoff <float>
-
--two_stage_clock_routing {on | off}
-
--verify_binary_search {on | off}
-
--verify_file_digests {on | off}
-
--version
-
--write_rr_graph <file>
-
-adder_cin_global
-
-check_golden
-
-clock<virtualornetlistclock>
-
-cmos_tech <file>
-
-create_golden
-
-delete_intermediate_files
-
-delete_result_files
-
-early
-
-ending_stage <stage>
-
-exclusive
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-from[get_clocks<clocklistorregexes>]
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-from[get_pins<pinlistorregexes>]
|
-
-group{<clocklistorregexes>}
-
-h, --help
-
-hold
-
-j <N>
-
-j, --num_workers <int>
-
-l <task_list_file>
-
-late
-
-limit_memory_usage
-
-max
-
-min
-
-min_hard_adder_size <int>
-
-min_hard_mult_size <int>
-
-name<string>
-
-period<float>
-
-power
-
-s <script_param> ...
-
-setup
-
-source
-
-starting_stage <stage>
-
-system {local | scripts}
-
-temp_dir <path>
-
-timeout <float>
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-to[get_clocks<clocklistorregexes>]
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-to[get_pins<pinlistorregexes>]
-
-track_memory_usage
-
-valgrind
-
-waveform{<float><float>}
-
<areagrid_logic_tile_area="float"/>
-
<auto_layoutaspect_ratio="float">
-
<block_typeid="int"name="unique_identifier"width="int"height="int">
-
<bufferslogical_effort_factor="float"/>
-
<cbtype="pattern">intlist</cb>
-
<chan_width_distr>content</chan_width_distr>
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<channelchan_width_max="int"x_min="int"y_min="int"x_max="int"y_max="int"/>
-
<clock_networkname="string"num_inst="integer">
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<clockC_wire="float"C_wire_per_m="float"buffer_size={"float"|"auto"}/>
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<clockname="string"num_pins="int"equivalent="{none|full}"/>
-
<coltype="string"priority="int"startx="expr"repeatx="expr"starty="expr"incry="expr"/>
-
<completename="string"input="string"output="string"/>
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<complexblocklist>content</complexblocklist>
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<connection_blockinput_switch_name="string"/>
-
<cornerstype="string"priority="int"/>
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<default_fcin_type="{frac|abs}"in_val="{int|float}"out_type="{frac|abs}"out_val="{int|float}"/>
-
<delay>
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<delay_constantmax="float"min="float"in_port="string"out_port="string"/>
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<delay_matrixtype="{max|min}"in_port="string"out_port="string">matrix</delay>
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<device>content</device>
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<directfrom="string"to="string">
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<directname="string"from_pin="string"to_pin="string"x_offset="int"y_offset="int"z_offset="int"switch_name="string"/>
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<directname="string"input="string"output="string"/>
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<dynamic_powerpower_per_instance="float"C_internal="float"/>
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<edgesrc_node="int"sink_node="int"switch_id="int"/>
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<equivalent_sites>
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<fc_overridefc_type="{frac|abs}"fc_val="{int|float}",port_name="{string}"segment_name="{string}">
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<fcin_type="{frac|abs}"in_val="{int|float}"out_type="{frac|abs}"out_val="{int|float}">
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<filltype="string"priority="int"/>
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<fixed_layoutname="string"width="int"height="int">
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<fromtype="string"switchpoint="int,int,int,..."/>
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<functype="string"formula="string"/>
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<grid_locx="int"y="int"block_type_id="int"width_offset="int"height_offset="int">
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<inputname="string"num_pins="int"equivalent="{none|full}"is_non_clock_global="{true|false}"/>
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<latency>
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<layout/>
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<local_interconnectC_wire="float"factor="float"/>
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<locside="{left|right|bottom|top}"xoffset="int"yoffset="int">name_of_complex_logic_block.port_name[int:int]...</loc>
-
<locxlow="int"ylow="int"xhigh="int"yhigh="int"side="{LEFT|RIGHT|TOP|BOTTOM}"ptc="int">
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<metadata>
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<metal_layername="string"Rmetal="float"Cmetal="float"/>
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<metaname="string">
-
<modename="string">
-
<muxname="string"/>
-
<muxname="string"input="string"output="string"/>
-
<netlistclocklistorregexes>
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<nodeid="int"type="unique_type"direction="unique_direction"capacity="int">
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<opin_switchname="string"/>
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<outputname="string"num_pins="int"equivalent="{none|full|instance}"/>
-
<pack_patternname="string"in_port="string"out_port="string"/>
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<path_multiplier>
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<pb_typename="string"num_pb="int"blif_model="string"/>
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<perimetertype="string"priority="int"/>
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<pin_classtype="pin_type">
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<pinlocationspattern="{spread|perimeter|custom}">
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<pinptc="block_pin_index">name</pin>
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<portname="string"energy_per_toggle="float"scaled_by_static_prob="string"scaled_by_static_prob_n="string"/>
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<portname="string"is_clock="{0|1}clock="string"combinational_sink_ports="string1string2..."/>
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<powermethod="string">contents</power>
-
<regiontype="string"priority="int"startx="expr"endx="exprrepeatx="expr"incrx="expr"starty="expr"endy="expr"repeaty="expr"incry="expr"/>
-
<ribmetal_layer="string"y="expr"startx="expr"endx="expr"repeatx="expr"repeaty="expr"/>
-
<rowtype="string"priority="int"starty="expr"repeaty="expr"startx="expr"/>
-
<sb_loctype="{full|straight|turns|none}"xoffset="int"yoffset="int",switch_override="string">
-
<sbtype="pattern">intlist</sb>
-
<segmentid="int"name="unique_identifier">
-
<segmentlist>content</segmentlist>
-
<segmentname="unique_name"length="int"type="{bidir|unidir}"freq="float"Rmetal="float"Cmetal="float">content</segment>
-
<segmentsegment_id="int">
-
<singletype="string"priority="int"x="expr"y="expr"/>
-
<sitepb_type="string"pin_mapping="string"/>
-
<sizingmux_trans_size="int"buf_size="float"/>
-
<sizingR_minW_nmos="float"R_minW_pmos="float"/>
-
<spinemetal_layer="string"x="expr"starty="expr"endy="expr"repeatx="expr"repeaty="expr"/>
-
<static_powerpower_per_instance="float"/>
-
<sub_tilename"string"capacity="{int}">
-
<switch_blocktype="{wilton|subset|universal|custom}"fs="int"/>
-
<switch_pointtype="{drive|tap}"name="string"yoffset="expr"xoffset="expr"xinc="expr"yinc="expr"buffer="string">
-
<switchblock_locationspattern="{external_full_internal_straight|all|external|internal|none|custom}"internal_switch="string">
-
<switchblock_locationtype="string"/>
-
<switchblockname="string"type="string">
-
<switchfuncs>
-
<switchid="int"name="unique_identifier"type="{mux|tristate|pass_gate|short|buffer}">
-
<switchlist>content</switchlist>
-
<switchtype="{mux|tristate|pass_gate|short|buffer}"name="string"R="float"Cin="float"Cout="float"Cinternal="float"Tdel="float"buf_size="{auto|float}"mux_trans_size="float",power_buf_size="int"/>
-
<T_clock_to_Qmax="float"min="float"port="string"clock="string"/>
-
<T_holdvalue="float"port="string"clock="string"/>
-
<T_setupvalue="float"port="string"clock="string"/>
-
<tapfrom="string"to="string"locationx="expr"locationy="expr"switch="string"fc_val="float">
-
<Tdelnum_inputs="int"delay="float"/>
-
<tilename="string"capacity="int"width="int"height="int"area="float"/>
-
<tiles>content</tiles>
-
<timingR="float"C="float">
-
<timingR="float"cin="float"Cout="float"Tdel="float/>
-
<timingR_per_meter="float"C_per_meter="float">
-
<totype="string"switchpoint="int,int,int,..."/>
-
<uncertainty>
-
<wire_switchname="string"/>
-
<wireconnnum_conns="expr"from_type="string,string,string,..."to_type="string,string,string,..."from_switchpoint="int,int,int,..."to_switchpoint="int,int,int,..."from_order="{fixed|shuffled}"to_order="{fixed|shuffled}"/>
-
<x_listindex="int"info="int"/><y_listindex="int"info="int"/>
-
<xdistr="{gaussian|uniform|pulse|delta}"peak="float"width="float"xpeak="float"dc="float"/>
-
<ydistr="{gaussian|uniform|pulse|delta}"peak="float"width="float"xpeak="float"dc="float"/>
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[get_clocks<clocklistorregexes>]
-
[get_ports{<I/Olistorregexes>}]
|